The present invention relates to a metal oxide semiconductor field-effect transistor (to be referred to as a MOSFET for brevity hereinafter) which is improved in operation speed and packing density.
A MOSFET is known in which a semiconductor region is formed on an insulating substrate, an n- or p-type impurity is diffused to a high concentration in the semiconductor region to form a source region and a drain region, and a thin insulation film is covered thereover to form a gate electrode. Although such a transistor is applicable to various purposes, it is frequently used as an integrated circuit. The performance which is generally required of such an integrated circuit includes high operation speed, high packing density and so on.
In a conventional MOSFET 20 as shown in FIG. 1, on an insulating substrate 22 of monocrystalline sapphire is formed a substrate 24 of Si in which is diffused a p-type impurity, for example B, to a concentration of 10.sup.15 atoms/cm.sup.3. A source region 26 and a drain region 28, in both of which is diffused an n-type impurity, for example P, to a concentration of 10.sup.18 atoms/cm.sup.3, are formed in the Si substrate. Metal wirings of, for example Al, are coupled to the source region 26 and the drain region 28 providing a source electrode 34 and a drain electrode 36. The metal constituting these electrodes forms ohmic contacts with source region 26 and the drain region 28, but the part of the aluminum is diffused in the source and drain regions to form diffusion layers 30 and 32. A gate electrode 40 is formed on the substrate region 25 through a thin insulating layer 38 consisting of SiO.sub.2, for example.
With such a conventional structure, high speed operation of the circuit is obstructed by the so-called charge pumping effect. Since the substrate region 25 is electrically coupled to the source region 26 and the drain region 28 only through the p-n junction, the substrate region 25 is kept at a negative potential by capacitive coupling with the gate electrode when the potential at the gate electrode abruptly changes in the negative potential. Then, the substrate region 25 and the source region 26, and the substrate 25 and the drain region 28 are kept reversely biased. When the potential of the gate electrode 40 changes in the positive direction, the potential of the substrate region 25 also changes in the positive direction. However, the p-n junction between the substrate region 25 and the source region 26 and that between the substrate region 25 and the drain region 28 are forwardly biased so that forward current flows and the potential at the substrate region 25 does not greatly shift in the positive direction. Thus, the substrate region 25 is kept at a negative potential on the average, and raises the threshold voltage of the MOSFET by the substrate bias effect of the body effect. When the threshold voltage becomes higher, the conductance of the MOSFET becomes small so that high speed operation of the circuit is obstructed. Especially with a MOSFET in which the substrate bias is not constant, i.e., a MOSFET of an SOS (silicon on sapphire) structure, the operation speed is disadvantageously easy to change due to fluctuations of the substrate bias. When the MOSFET is used as a transfer gate, it is frequently the case that a negative voltage compared with that of the source and drain regions is applied to the gate electrode under the condition that an inversion layer is not formed. Accordingly, the capacitive coupling between the gate electrode and the substrate region tends to be strong. Thus, as has been described, the threshold voltage increases by the substrate bias effect so that high speed operation of the element tends to be obstructed. Of course, when an inversion layer is formed, screening effects are obtained between the gate electrode and the substrate region so that the capacitive coupling between the gate electrode and the substrate region becomes weak, thereby reducing the above-described defects.